Requirements
BE/B.Tech /ME/M.Tech 2 years to 15 years
- Develop verification testbench components for chip/module level using System Verilog, C/C++.
- Use Verification methodologies (Object oriented, UVM etc) to develop extendable test-bench/test-cases environment.
- Define and execute a detailed verification plan from spec working with architects, designers, system engineers.
- Write tests, Debug tests, automate regression scripts and regression environment.
- Incorporate code-coverage, functional coverage, assertions, cover-groups etc to achieve 100% verification completeness prior to tapeout.
- Organized and creative thinker, motivated, and independent learner who can multitask in a dynamic environment, able to create and implement new solutions where required.
- Excellent debugging skills in both SW and ASIC hardware.
- Must be good in building verification environments preferably using Verilog, System Verilog, UVM, C/C++/PLI etc.
- Proficiency in a scripting language like Perl, Tcl/Tk, Shell is a definite plus.
- Experience with simulators like ncVerilog (Incisive), VCS, Eldo and debug tools like Verdi/Debussy.
- Good understanding of the latest formal verification techniques, assertions, properties is a plus.
- Understanding or prior experience with Industry standard protocols like USB, SPI, SATA, Ethernet, DisplayPort, SRIO etc is a definite plus.
- Understanding or Prior Experience in ARM/Tensilica Processor platforms is a definite plus.
- Good written and oral communication skills. Ability to clearly document plans.
- ability to interface with different teams and prioritize work based on project needs.
Company Profile
Founded in the December of 2010 by a group of VLSI professionals with an in-depth knowledge and experience of more than 20+ years in the field of ASIC design, the First Pass Semiconductors technical team has cumulatively worked on more than 90+ ASIC tape-outs, ranging from 0.13um to 07nm process nodes in TSMC, UMC, Chartered and IBM Foundries.
Services
- Design & Verification
- Physical Design
- Analog Layout
Email your Resume: [email protected]
I am Deepthi pursuing M Tech (VLSI-SD) 2nd Yr in JNTUA Is their any interns in your firm…If there are interns please do share your selection process
Thank you
Hello Deepthi
we will notify you shortly via mail regarding your query.
Thank you