Bhubaneswar, Bangalore, Delhi, Mumbai, Hyderabad
Responsible for feature list development and development of the verification plan.
Able to individually contribute to the development of testbench and test case development.
Responsible for writing required documentation on test benches and/or test plans.
Responsible for debugging the design and follow-ups till resolution.
Able to own and drive product development leading a team of 2-3 junior engineers.
Education and Experience:
Bachelors/Masters in engineering basically Electronics.
Expected experience is a minimum of 2+ years in the relevant area.
Associated with Verification especially using industry standard protocols & methodology
Can be ASIC or SOC verification sign off (full verification cycle) for at least 2 projects.
Can be IP development for at least 2 projects.
Can be VIP development: at least fully handled 2 VIP developments
Any two of the following protocols:
USB, PCI Express, SATA, AMBA
Languages: Hands-on experience with System Verilog, UVM & Verilog at a minimum.
Should have used Object Oriented Programming in the projects worked on.
Send your updated resume to the email id:
Company Profile :
Asiczen Technologies is a VLSI and Embedded Systems (IoT) company.
Their VLSI team focuses on churning out Verification IPs, mostly in high speed interconnect, automotive and memory domains. It also provides SoC/IP design verification services to our customers.
The Embedded team’s expertise ranges from Firmware & Device Drivers Development, RTOS Porting to Embedded Reference Board Development on microcontroller, ARM processor and
DSP processor-based platforms. This team is responsible for Asiczen’s IoT offerings in smart home, smart city, and smart solutions area.
Company Website : http://www.asiczen.com/