Job Description: This is an exciting role in a new team in Intel India. The Quartus Validation Engineer focuses on validating PSG’s FPGA design software and ensuring OS compatibility, dedicated to improving the quality and user experience of our FPGA design software.
Responsibilities: Develop automation plans to support new Software features, device architectural support and OS compatibility Develop and design tests and test scripts to improve the quality of the Quartus Work with IT and Design Automation team to maintain test infrastructure You will also require to work with cross-department developers on the test/build operation issues and drive for solutions/enhancements through enhancing the automation tools and processes.
o Student of Masters/Ph.D. degree in Computer Science, VLSI, Microelectronics or equivalent from a reputed institute. o Basic knowledge in RTL: Verilog. o Good programming knowledge in C, C++, and scripting languages o 2+ years of experience in one or more scripting languages such as Python, Perl or Tcl o Knowledge in Unix basics and scripting languages like Perl, Python, Tcl, etc. o Good team player with good interpersonal and communication skills.
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera’s industry-leading FPGA technology and customer support with Intel’s world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative and allows our employees to reach their full potential.