Post Views: 25 Testing a VLSI (Very Large Scale Integration) design block is a multistep process aimed at ensuring its functionality and performance. The testing process involves the following key steps: Pre-silicon Verification: Before fabrication, the design undergoes extensive simulation using tools such as Verilog or VHDL simulators. This step helps identify and rectify design …
Post Views: 10 Pre-silicon verification is a vital aspect of VLSI (Very Large Scale Integration) design, involving the validation of a design before its physical fabrication. This step is crucial for ensuring that the design functions correctly and meets its specified requirements. Pre-silicon verification typically includes extensive simulation and analysis using specialized tools and methodologies. …
Post Views: 58 Important Dates: Registration Start: 12th January, 11 AM Registration Ends: 2nd Feb, 11 PM Starts at: February 04, 12:00 AM (IST) Ends at: February 29, 12:00 AM (IST) N.Ex.T Basic Test – Feb 4th, 2024 N.Ex.T Advanced Test – Feb 11th, 2024 Interviews – Feb 15th, 2024 onwards N.Ex.T is a unique …
NVIDIA N.Ex.T (NVIDIA Exceptional Talent) 2024 for Engineering Graduates Read More »
Post Views: 34 The overall interview process is divided into 3 parts: The first part is Digital Logic design or Digital electronics concepts: Answer: A Karnaugh Map (K-Map) is a graphical representation of truth tables used in digital design for simplifying Boolean algebra expressions. It helps in minimizing the number of terms in a Boolean …
Design Verification Interview Question with Answer-Part-1 Read More »
Post Views: 9 Last Date of Registration Process : January 15, 2024 Detail of the Post: Name of Post: Junior Research Fellow (JRF) Number of Posts: One (01) Monthly Emolument: Rs. 31,000/- + 8% HRA (for first two years)Rs. 35,000/- + 8% HRA (for 3rd year) Essential Qualification: M.Tech./M.E. Degree in Mechanical /Electrical/Instrumentation/Electronics orequivalent streams …
Post Views: 58 Job Code : JR42302 Intern – Design Verification Location : Hyderabad , Telangana Eligibility: Job Description : The Intern – Design Verification in the Non-Volatile Memory Group at Micron Technology, Inc., will be a core technical individual contributor in the design and verification of the on-chip controller and mixed-signal circuitry in NAND …
VLSI Design Verification Internship @Micron Technology Hyderabad Read More »
Post Views: 19 Registration Start Date 02-11-2023 Registration End Date 30-11-2023 Type – Open ChallengeDisplay – Flagship EventsVenue – Online Event Electropreneur Park-Bhubaneswar, an ESDM CoE of Software Technolgy Parks of India with support from the Electronics & IT Department, Govt. of Odisha, Odisha Computer Application Centre (OCAC), IESA, Synopsis, and Industry Partners, is organising …
Odisha Semiconductor Design Challenge (Last Date: 30-11-2023) Read More »
Post Views: 24 Trithon 2023Trithon 2023 is an inter-college level coding challenge that identifies students from different colleges with innovative ideas to serve the benefit of humanity in general. There is no registration fee to participate in this challenge. It is a multi-level challenge, with rejection at each level. It’s a non-stop product development competition, …
Trithon-2023 by Trident Group of Institutions ,Bhubaneswar Read More »
Post Views: 44 Introduction: The world of electronics has experienced a remarkable transformation with the advent of System on Chip (SoC) technology. These highly integrated circuits have revolutionized the way electronic systems are designed, offering unprecedented levels of performance, power efficiency, and miniaturization. In this comprehensive article, we will explore the intricacies of SoCs, their …
Post Views: 46 This is the second part of Embedded Engineer Interview series. These questions are also helpful for the aspirant who are preparing for their semester examination of UG or PG.
